www.riscos.com Technical Support: Programmer's Reference Manual

Introduction to RISC OS 3.5 and RISC OS 3.6

Introduction

RISC OS 3.5 is an operating system written by Acorn for its Risc PC computers that use the new ARM600 / ARM700 hardware architecture. This version was only changed where it was necessary to support the changing hardware. RISC OS 3.6 is a further development, which adds support for machines using the similar ARM7500 architecture, and integrates software that was previously separately available. We have tried to make both versions as compatible as possible with the RISC OS 3.1 operating system.

RISC OS terminology

The operating system known as RISC OS 2 in this manual consists of two variants, RISC OS 2.00 and RISC OS 2.01.

The operating system known as RISC OS 3 in this manual consists of two variants, RISC OS 3.00 and RISC OS 3.10.

The operating system known as RISC OS 3.5 in this manual is RISC OS 3.50, and is the version supplied with the first generation of Risc PC computers.

The operating system known as RISC OS 3.6 in this manual is RISC OS 3.60, and is the version supplied with the second generation of Risc PC computers, and the first generation of A7000 computers.

Hardware overview

The main electronic components of a Risc PC computer are:

• An ARM (Advanced RISC Machines) ARM610 or ARM700 processor, which provides the main processing.

• A VIDC20 (Video Controller) chip, which provides the video and sound outputs.

• An IOMD (Input Output Memory Device) which provides the interface between the ARM chip, the VIDC chip, the memory and other support chips.

  This chip replaces the IOC and MEMC chips used in earlier RISC OS computers.

The main component of the A7000 is the ARM7500 chip; this integrates all the above functionality into a single chip.

Other components

The other components are:

• ROM (Read Only Memory) chips containing the operating system.
• RAM (Random Access Memory) chips.
• VRAM (Video RAM) chips used for video display (if fitted).
• Peripheral controllers (for devices such as discs, the serial port, networks and so on).

Schematic

The diagram below gives a schematic of an architecture which may be viewed as typical of the Risc PC range of computers.

Schematic of a Risc PC computer

ARM 610 and ARM 700

The ARM is a RISC (Reduced Instruction Set Computer) processor. The initial range of Risc PC computers can use two different versions of the ARM processor.

• The ARM610 delivers about 5 times the power of an ARM 2 (23 MIPs, or million instructions per second, compared to some 4 - 5 MIPS for the ARM2).
• The ARM700 delivers about 8 times the power of an ARM 2 (an estimated 35 MIPS). The ARM 700 also has a direct connection for a hardware floating point chip.

From the application programmer's point of view, there is no difference between the two processors. The ARM700 supports the same instruction set as the ARM610.

It is possible that other chips in the ARM6 / ARM7 family may also be used.

The VIDC20 chip

The VIDC20 chip is an updated version of the VIDC1 and VIDC1a chip used in the previous generation of Acorn computers. The main differences are that VIDC20 provides:

• A wide range of resolution options including VGA, SuperVGA and XGA resolution.
• 1, 2, 4, 8, 16 and 32 bits per pixel.
• 8 bit DACs giving 16 million colours.

Video data transfer

The VIDC20 has a 64 bit data bus allowing a high data bandwidth from memory. VIDC20 takes data from the memory banks under DMA control. VIDC20 takes its data from VRAM if it is fitted, otherwise it takes data from DRAM.

Palette

The VIDC 20 contains 296 write-only registers: 256 of these are used as the 28 bit video palette entries. Each entry uses 8 bits for Red, 8 bits for Green and 8 bits for Blue with 4 bits for external data.

The video palette entries or Look up tables (LUT) allow for logical to physical translation and gamma correction. The Red, Green and Blue LUTs each drive their respective DACs. These DACs give a total of 16 million possible colours.

Pixel clock

VIDC20 can generate a display at any pixel rate up to at least 110Mhz. The clock can be selected from one of three sources, and then divided by a factor of between 1 and 8.

The VIDC20 also contains a phase comparator which - when used with an external Voltage Controlled Oscillator - forms a Phase Locked Loop. This allows a single reference clock to generate all the required frequencies for any display mode. You do not need multiple external crystals.

Sound system

The sound system is compatible with the VIDC1 sound system with an independent sound clock (24MHz). It features an 8 bit (logarithmic) system using an internal DAC. This gives eight channels each with its own stereo position.

The device can work with 1, 2, 4 or 8 stereo channels using time division multiplexing to synthesise left and right outputs. The sample rate is programmable through the Sound Frequency Register.

Cursor

VIDC20 has a hardware cursor for all its modes. The cursor is 32 pixels wide and any number of pixels high. Each pixel can be transparent, or one of three colours chosen from its own 28 bit wide palette. The cursor can be any shape or colour within these limits.

The IOMD chip

The IOMD is a specialised custom chip that takes the place of several large chips used in the old architecture.

IOMD includes some of the circuitry formerly in the IOC and MEMC chips, as well as a large amount of 'glue' logic.

The features of the IOMD include:

• Direct interface to ARM6xx/ARM7xx processors
• 16 bit steered bus, for on-board peripherals
• IOC functionality (ticker, interrupt manager, IIC, I/O control)
• Memory controller for DRAM and VRAM
• DMA controller for I/O, sound, cursor and video data
• PC keyboard interface
• Quadrature mouse interface.

General architecture

The IOMD is a memory, DMA and I/O controller.

It has a CPU interface for an ARM610/ARM700 type processor which can allow an additional processor to be connected. The CPU interface consists of the processor address, data and control buses.

There is a DRAM and VRAM control bus which has RAS, CAS, multiplexed address and other control lines. There are a number of DMA address generators, for sound, cursor, and general I/O DMA. There is also VRAM control logic, including logic to generate transfer cycles.

Since the whole 32 bits of the main system bus connects to IOMD, it is possible for IOMD to transfer data using DMA (Direct Memory Access) from DRAM into itself. There is a 16 bit I/O bus on IOMD, and there is byte (and half-word) steering logic to allow DMA data at arbitrary byte (or half-word) memory locations to be transferred to/from the I/O system using this bus. The 16 bit I/O bus forms the lower 16 bits of the 32 bit podule interface. IOMD controls the latches for the upper 16 bits of the extended podule bus, which allows 32 bit transfers.

IOMD contains a large subset of the functionality of IOC, including two general purpose counter/timers (timer 0 and timer 1) and the interrupt control registers. The IOC baud rate and keyboard serial rate timers are not implemented in IOMD, nor are all of the general purpose I/O lines. The allocation of interrupt lines is largely similar to previous machines.

IOMD provides a PC keyboard interface instead of the Archimedes KART interface supported by IOC. This consists of an 8 bit synchronous serial interface, with interrupt generation capability.

The chip contains a quadrature mouse interface. This consists of X and Y counters that are incremented and decremented by mouse movements. The counters wrap when they overflow or underflow, and are read regularly under interrupt. The VSync interrupt is used (although the centi-second timer could be used) as it allows updating every frame; there is no point in updating the screen more often than this. The X and Y counters are each 16 bits wide.

ARM7500

The ARM7500 is a monolithic device that integrates an ARM7 processor, a video generator similar to VIDC20, and most of the functions of IOMD. The major differences are:

• The ARM7500 provides two PS/2-style asynchronous serial keyboard ports (one for the keyboard, and one for the mouse), rather than IOMD's synchronous serial keyboard port and quadrature mouse interface of IOMD.
• The ARM7500 provides a four channel PC joystick interface, not available with IOMD.

RISC OS overview

The chapters that follow describe the changes introduced in RISC OS 3.5 and RISC OS 3.6. These changes are summarised below.

RISC OS 3.5

• Memory management has been considerably improved. Much greater amounts of physical memory are supported, and the address space is larger. Second processors can claim memory. You can now create and manipulate your own dynamic areas.
• A module has been provided to support DMA (direct memory access).
• Video and sprite capabilities have been extended to support the huge range of screen modes and colours now possible. There are new ways of selecting and specifying screen modes and monitors, and a new sprite format. Many calls have been extended to support these.
• The parallel and serial device drivers have been made considerably more fast and efficient.
• The buffer manager now allows you to insert and remove buffered data without incurring the overheads of calling SWIs
• Keyboard support has been removed from the kernel. It has been replaced by a device driver module so a standard PC keyboard can be used, greatly expanding the range of available input devices.
• The quadrature mouse driver has been removed from the kernel and placed in its own module. A serial mouse driver for a PC-type mouse is available as an alternative.
• The CMOS RAM and hard disc can now be password protected against malicious or accidental changes. The CMOS RAM can also be protected in hardware against the effects of power-on resets.
• The reset behaviour has been rationalised.
• Support is provided in ROM for AUN (Acorn Universal Networking).
• The appearance of the desktop has been considerably improved. It now has a 3D appearance, uses an outline font, and can tile window backgrounds with a texture.
• The Filer now allows much longer filenames, and changes column widths to accommodate them. A new icon is used to distinguish open directories. Dragged objects now appear as an icon, rather than as a dashed rectangle.
• The Wimp's error system has been extended to improve its appearance, allow more customisation, and provide more user friendly dialogues.
• DragASprite now makes dragged icons semi-transparent by default, so you can easily see what lies under them.
• A watchdog has been added so you can easily kill runaway programs that do not return control to the Wimp.
• A new Boot application has been added. Your applications can easily add and remove commands to this application, making their installation and removal much easier.
• A new ColourPicker module provides a facility for all applications to use when colours must be specified. It of course supports the full range of colours available under RISC OS 3.5.
• Expansion cards now have 32 bit wide data paths, and a directly mapped area of 16MB per card.
• A new dedicated network interface is supported.
• Screen blanking now supports monitor power saving using the new DPMS standard.

RISC OS 3.6

• Modules can use a message file when outputting text from the help and command keyword table.
• Further minor extensions have been made to the video system: in particular, support has been added for palettes in the new sprite format.
• The SpriteExtend module's SWI interface has been extended to support JPEG images, providing information on the images, and simple scaled plotting and printing.
• The new CompressJPEG module provides SWIs with which you can compress raw data into a JPEG image.
• The Draw file format has been extended so you can include JPEG images.
• FileSwitch, FileCore and the Free module have been extended to support larger capacity storage devices. Under FileCore, the recommended maximum hard disc size is 4 GB, and the maximum size of a file (and hence of an image filing system) is 2 GB.
• ADFS supports IDE discs that use logical block addressing - a method of disc addressing which is superseding the old cylinder-head-sector method.
• The 32 MB limit on the size of a DOSFS image file has been removed by using a newer type of DOS boot block. DOSFS is also less stringent in its checking of DOS formats; some discs that earlier versions of DOSFS rejected are now accepted.
• Support has been added for CDs and CD-ROMs. The CDFS filing system can access files on a CD-ROM that conforms to the widely used ISO 9660 standard. There are commands with which you can play audio CDs and read audio data directly from a CD.
• The keyboard and mouse drivers support a PS/2 keyboard and mouse, using an asynchronous serial interface such as the ARM7500 provides.
• The cut-down Internet module provided as part of RISC OS 3.5's AUN support has been replaced by the complete version.
• Acorn Access - Acorn's entry level product for AUN networking - is now a part of RISC OS. It provides peer to peer networking using TCP/IP protocols, allowing sharing of resources such as discs and printers.
• The new DragAnObject module provides SWI calls similar to those provided by the DragASprite module, save that you can use them to make the pointer drag any object that you can render.
• The new DrawFile module renders Draw files either to the screen, or to a printer driver during printing. This makes it easy for you to support imported Draw files in your applications.
• The range of Boot applications has been extended, mainly to support network booting.
• Further changes have been made to printing, largely to support JPEGs.
• The SoundDMA module has been extended to support 16 bit sound, as well as the 8 bit -law sound used by all earlier versions of RISC OS.
• The Joystick module has been extended both to support PC-style analogue joysticks, and to provide calls used with analogue input devices on older Acorn machines.
• The Toolbox modules from Acorn C/C++ have been added to RISC OS. Toolbox applications therefore don't need to load the modules into RAM, hence decreasing their memory usage.

This edition Copyright © 3QD Developments Ltd 2015
Last Edit: Tue,03 Nov 2015